NVIDIA HGX B200 NVSwitch Redesign: 4 Chips to 2
NVIDIA’s HGX B200 platform introduces a significant physical redesign of the NVLink interconnect subsystem.
A bare HGX B200 motherboard showcased by Foxconn subsidiary Ingrasys at Computex 2024 revealed that NVIDIA had reduced the number of NVSwitch chips from four on the H100/H200 generation to two on the B100/B200 generation.
The two remaining NVSwitches are also positioned near the center of the motherboard, rather than along one side as on previous HGX platforms.
This is more than a simple component-count reduction. The new layout reflects the increasing bandwidth requirements of NVIDIA’s latest GPUs and the resulting need to optimize high-speed electrical paths across the board.
🧱 First-Generation NVSwitch: DGX-2 #
NVIDIA introduced NVSwitch with the DGX-2, creating a scalable fabric for connecting multiple GPUs through NVLink.
The first-generation switch featured:
| Specification | First-Generation NVSwitch |
|---|---|
| Transistor Count | ~20 billion |
| NVLink Ports | 18 |
| Port Bandwidth | 50 GB/s |
| Aggregate Bandwidth | 900 GB/s |
| Control Interfaces | PCIe Gen2 x4, I²C, GPIO |
A DGX-2 baseboard used six NVSwitch chips to establish a high-bandwidth interconnect fabric across eight V100 GPUs.
Two baseboards could then be connected to create a system containing 16 V100 GPUs, with additional connectivity available for POWER9 CPUs supporting NVLink 2.0.
Six-switch baseboard topology #
The six-switch architecture distributed the NVLink fabric across the board, allowing each GPU to establish high-speed connections through the switching layer.
Early HGX-2 implementations, including systems such as the Inspur NF5488M5, clearly exposed the six-switch arrangement through the corresponding heatsinks.
This topology established the foundation for NVIDIA’s multi-GPU scaling strategy.
⚙️ Second-Generation NVSwitch: A100 #
The introduction of the A100 brought a larger and more sophisticated NVSwitch implementation.
NVIDIA also shifted toward delivering more complete HGX A100 modules to system manufacturers, simplifying OEM integration.
Systems such as the Inspur NF5488A5 continued to use six NVSwitches, maintaining the fundamental multi-switch topology established with the earlier generation.
However, increasing GPU performance and NVLink bandwidth requirements would eventually force another change in the physical architecture.
🚦 Third-Generation NVSwitch: H100 and H200 #
The H100 generation introduced a major reduction in switch count.
Instead of six NVSwitches, HGX H100 adopted four NVSwitch chips, positioned along one side of the motherboard.
The change reflected improvements in switch capability and increasing integration density.
HGX H200 layout #
The HGX H200 retained a layout broadly similar to H100.
The four-switch arrangement remained the primary architectural configuration, with the NVSwitch components located toward one side of the board.
This design worked for the H100/H200 generation, but the substantially higher performance of Blackwell GPUs created new signal-integrity and routing challenges.
🔄 Fourth-Generation NVSwitch: B100 and B200 #
The Blackwell generation introduces the most substantial HGX NVSwitch layout change to date.
The HGX B100 and HGX B200 share the same basic motherboard architecture, according to NVIDIA’s platform design.
The most visible changes are:
- NVSwitch count reduced from four to two
- Both NVSwitches relocated to the center of the motherboard
- PCIe retimers placed toward the board edges
- Shorter high-speed signal paths between GPUs and switches
The HGX B200 bare motherboard makes the redesign particularly easy to see because the switch locations and board routing are exposed without heatsinks.
PCIe retimers move to the edges #
Another important change is the appearance of PCIe retimers in locations previously occupied by NVSwitch-related components.
These devices help maintain signal quality across high-speed PCIe links, particularly as data rates increase and electrical margins become tighter.
The retimers require substantially less cooling than the major NVSwitch devices, with individual thermal requirements reportedly around 10–15W.
📐 Why NVIDIA Moved the NVSwitches to the Center #
The physical position of an NVSwitch matters because high-speed electrical links are sensitive to trace length, loss, impedance discontinuities, crosstalk, and other signal-integrity constraints.
Moving the switches closer to the center of the GPU array allows NVIDIA to optimize the topology around the physical arrangement of the eight accelerators.
Shorter NVLink traces #
With four GPUs positioned on each side of the HGX B200 board, centrally located NVSwitches can reduce the average distance between the switches and GPU packages.
Shorter traces reduce electrical loss and make it easier to maintain signal integrity at increasingly high data rates.
Improved signal integrity #
As NVLink bandwidth increases, the margin for board-level signal degradation decreases.
The central switch placement provides more symmetrical routing and reduces the need for long high-speed traces extending from one side of the board to distant GPUs.
This becomes increasingly important as Blackwell pushes higher aggregate GPU-to-GPU bandwidth.
Lower board-level power and complexity #
Reducing the number of NVSwitch chips from four to two also reduces the number of high-power components that must be powered and cooled.
However, the reduction should not be interpreted simply as NVIDIA removing functionality. The newer-generation NVSwitch is significantly more capable, allowing two switches to replace the functionality previously distributed across four devices.
The result is a more integrated switching topology rather than merely a smaller implementation.
🔌 NVLink and GPU Grouping #
The HGX B200 layout is organized around the physical grouping of the eight Blackwell GPUs.
With four GPUs positioned on each side of the motherboard, central NVSwitch placement provides a more balanced interconnect geometry.
This is particularly important for systems where GPU-to-GPU communication is a major performance bottleneck.
Large AI models frequently require accelerators to exchange enormous volumes of activation, gradient, and parameter data. The interconnect fabric therefore plays a role almost as important as the raw compute capacity of the GPUs.
Interconnect efficiency becomes increasingly important #
As GPU compute performance grows, inefficient communication can increasingly limit overall system utilization.
A faster GPU cannot deliver its theoretical performance if it spends significant time waiting for data from another accelerator.
The HGX B200 redesign addresses this problem at the physical board level by optimizing the location and routing of the NVLink switching infrastructure.
🧊 Thermal and Mechanical Considerations #
The NVSwitch redesign also changes the thermal distribution of the motherboard.
Previous HGX generations placed multiple large NVSwitch cooling assemblies in a concentrated region of the board. B200 instead uses two larger-generation switches located centrally, while smaller retimer components occupy peripheral locations.
This creates a different cooling and airflow problem for OEM system designers.
Rather than simply adding more switching hardware as GPU bandwidth increases, NVIDIA is using higher-capability switching silicon and a more optimized physical topology.
The approach demonstrates how modern AI-server design increasingly requires co-optimization of:
- GPU placement
- NVLink topology
- PCB routing
- Signal integrity
- Power delivery
- Thermal management
- Mechanical constraints
📊 HGX NVSwitch Evolution #
The progression across NVIDIA’s major HGX generations illustrates how the switching architecture has evolved alongside GPU performance.
| Platform Generation | NVSwitch Count | General Layout |
|---|---|---|
| DGX-2 / HGX-2 | 6 | Distributed across the board |
| HGX A100 | 6 | Distributed multi-switch design |
| HGX H100 | 4 | Concentrated toward one side |
| HGX H200 | 4 | Similar to H100 |
| HGX B100/B200 | 2 | Centrally positioned |
The trend is notable: NVIDIA has progressively reduced switch count while increasing the capability of each generation.
This allows the board to become more efficient even as total GPU and interconnect bandwidth continues to increase.
🚀 What the HGX B200 Redesign Means #
The HGX B200 motherboard represents a significant evolution in NVIDIA’s multi-GPU interconnect design.
The headline change is straightforward:
Four NVSwitches have become two, and the switches have moved to the center of the board.
But the engineering motivation is more significant than the component count.
The new topology is designed around Blackwell’s higher bandwidth requirements, shorter signal paths, improved routing symmetry, and better integration with the eight-GPU HGX layout.
PCIe retimers now occupy the board edges, while the higher-capability fourth-generation NVSwitches provide the central fabric connecting the GPUs.
As AI workloads increasingly depend on tightly coupled multi-GPU execution, board-level interconnect engineering becomes a critical part of overall accelerator performance.
The HGX B200 redesign demonstrates that NVIDIA’s next-generation AI systems are not simply faster GPUs mounted on existing server boards. The entire electrical, thermal, and interconnect architecture is evolving alongside the accelerator silicon.